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Package: yosys-abc (0.52-1)
Links for yosys-abc
Debian Resources:
Download Source Package yosys:
- [yosys_0.52-1.dsc]
- [yosys_0.52.orig-abc.tar.gz]
- [yosys_0.52.orig.tar.gz]
- [yosys_0.52-1.debian.tar.xz]
Maintainers:
External Resources:
- Homepage [github.com]
Similar packages:
Sequential Logic Synthesis and Verification Algorithms
ABC is a system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. It combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification.
This is a fork of berkeley-abc maintained by the YosysHQ team for use in the yosys RTL synthesis framework.
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Download yosys-abc
| Architecture | Package Size | Installed Size | Files |
|---|---|---|---|
| arm64 | 4,271.4 kB | 12,054.0 kB | [list of files] |