软件包：verilator（5.024-1 以及其他的）

[ 源代码： verilator  ]

fast free Verilog simulator

Verilator is the fastest free Verilog HDL simulator, and beats many commercial simulators. It compiles synthesizable Verilog (not test-bench code!), plus some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code. It is designed for large projects where fast simulation performance is of primary concern, and is especially well suited to generate executable models of CPUs for embedded software design teams.

标签: 领域: 电子学, 实做语言: C++, implemented-in::perl, interface::commandline, 角色: 程序, Purpose: 仿真

其他与 verilator 有关的软件包

• dep: libjs-sphinxdoc (>= 7.4)

  JavaScript support for Sphinx documentation

• dep: perl

  拉里 沃尔的实用报表提取语言(Perl)

• dep: python3

  interactive high-level object-oriented language (default python3 version)

• dep: sphinx-rtd-theme-common (>= 2.0.0+dfsg)

  sphinx theme from readthedocs.org (common files)

• rec: libsystemc-dev

  Development files for SystemC library

• sug: gtkwave

  VCD (Value Change Dump) file waveform viewer

下载 verilator

下载可用于所有硬件架构的

硬件架构	版本	软件包大小	安装后大小	文件
i386	5.024-1+b2	1,405.4 kB	4,191.0 kB	[文件列表]