Paket: opensta (0~20191111gitc018cb2+dfsg-1)

[ Kaynak: opensta  ]

Gate-level Static Timing Analyzer

After synthesis, place and route of a digital circuit, it is necessary to verify the timing of the design. OpenSTA is a tool for doing exactly that. It has a Tcl interface for entering commands for analysing designs.

It typically takes as input a verilog netlist, a liberty file, and other parasitics information from the placed and routed design.

opensta ile İlgili Diğer Paketler

• dep: libc6 (>= 2.29)

  GNU C Library: Shared libraries
  ayrıca şunun tarafından sağlanan bir sanal paket libc6-udeb

• dep: libgcc1 (>= 1:3.0)

  Paket mevcut değil

• dep: libreadline8 (>= 6.0)

  GNU readline and history libraries, run-time libraries

• dep: libstdc++6 (>= 6)

  GNU Standard C++ Library v3

• dep: libtcl8.6 (>= 8.6.0)

  Tcl (the Tool Command Language) v8.6 - run-time library files

• dep: zlib1g (>= 1:1.1.4)

  compression library - runtime

opensta indir

Tüm mevcut mimariler için indir

Mimari	Paket Boyutu	Kurulu Boyut	Dosyalar
s390x	698,8 kB	3.875,0 kB	[dosya listesi]