[ 原始碼: iverilog ]
套件:iverilog(12.0-2 以及其他的)
Icarus verilog compiler
Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs.
The compiler can target either simulation, or netlist (EDIF).
其他與 iverilog 有關的套件
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- dep: libbz2-1.0
- high-quality block-sorting file compressor library - runtime
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- dep: libc6 (>= 2.34) [riscv64]
- GNU C 函式庫:共用函式庫
同時作為一個虛擬套件由這些套件填實: libc6-udeb
- dep: libc6 (>= 2.35) [除 arm64, riscv64]
- dep: libc6 (>= 2.38) [arm64]
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- dep: libgcc-s1 (>= 3.0) [除 armel, armhf, i386, riscv64]
- GCC 支援函式庫
- dep: libgcc-s1 (>= 3.4) [riscv64]
- dep: libgcc-s1 (>= 3.5) [armel, armhf]
- dep: libgcc-s1 (>= 7) [i386]
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- dep: libreadline8t64 (>= 6.0)
- GNU readline 與 history 函式庫,執行時期函式庫
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- dep: libstdc++6 (>= 13.1)
- GNU Standard C++ Library v3
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- dep: zlib1g (>= 1:1.2.0)
- 壓縮函式庫 - 跑程式時用(runtime)
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- sug: gtkwave
- VCD (Value Change Dump) file waveform viewer
下載 iverilog
硬體架構 | 版本 | 套件大小 | 安裝後大小 | 檔案 |
---|---|---|---|---|
amd64 | 12.0-2+b1 | 1,998。1 kB | 7,022。0 kB | [檔案列表] |
arm64 | 12.0-2+b2 | 1,807。6 kB | 7,742。0 kB | [檔案列表] |
armel | 12.0-2+b1 | 1,731。9 kB | 6,199。0 kB | [檔案列表] |
armhf | 12.0-2+b1 | 1,786。5 kB | 4,899。0 kB | [檔案列表] |
i386 | 12.0-2+b1 | 2,076。8 kB | 7,043。0 kB | [檔案列表] |
mips64el | 12.0-2+b1 | 1,658。7 kB | 9,106。0 kB | [檔案列表] |
ppc64el | 12.0-2+b1 | 2,001。7 kB | 9,093。0 kB | [檔案列表] |
riscv64 | 12.0-2+b2 | 1,995。6 kB | 6,278。0 kB | [檔案列表] |
s390x | 12.0-2+b1 | 1,957。2 kB | 7,271。0 kB | [檔案列表] |