原始碼套件:verilator(4.010-1)
本原始碼套件構建了以下這些二進位制包:
- verilator
- fast free Verilog simulator
其他與 verilator 有關的套件
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- adep: debhelper (>= 12)
- helper programs for debian/rules
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- adep: flex
- fast lexical analyzer generator
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- adep: bison
- YACC-compatible parser generator
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- adep: libfl-dev
- static library for flex (a fast lexical analyzer generator)
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- adep: libsystemc-dev [amd64 arm64 i386 kfreebsd-any]
- Development files for SystemC library
Download verilator
檔案 | 大小(單位:kB) | MD5 校驗碼 |
---|---|---|
verilator_4.010-1.dsc | 1。6 kB | 4993c085645a0cc2376e04b3f8542a86 |
verilator_4.010.orig.tar.gz | 2,446。1 kB | 78de7fb36496e388e50a27861afe5f23 |
verilator_4.010-1.debian.tar.xz | 9。2 kB | a3caaa1d5c5e1b67bb7ed407a67afd66 |
- Debian 套件原始碼倉庫(VCS:Git)
- https://salsa.debian.org/electronics-team/verilator.git
- Debian 套件原始碼倉庫(可線上瀏覽)
- https://salsa.debian.org/electronics-team/verilator