[ buster ]
[ 原始碼： myhdl ]
套件：myhdl-cosimulation（0.10-2）
MyHDL cosimulation files
MyHDL turns Python into a hardware description and verification language, providing hardware engineers with the power of the Python ecosystem.
Python can then be used as an event-driven simulator using Python decorators actively to specify what corresponds to 'processes' in Verilog / VHDL and thereby achieve concurrency.
This package provides the sources for executable extensions of the core modules.