软件包：arachne-pnr（0.1+20190728gitc40fb22-3） [debports]
Place and route tool for iCE40 family FPGAs
Arachne-pnr implements the place and route step of the hardware compilation process for FPGAs. It accepts as input a technology-mapped netlist in BLIF format, as output by the Yosys synthesis suite for example. It currently targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a textual bitstream representation for assembly by the IceStorm icepack command. The output of icepack is a binary bitstream which can be uploaded to a hardware device.
Together, Yosys, arachne-pnr and IceStorm provide an fully open-source Verilog-to-bistream tool chain for iCE40 1K and 8K FPGA development.
The authors of arachne-pnr have now prepared its successor 'nextpnr'.
其他与 arachne-pnr 有关的软件包
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- dep: arachne-pnr-chipdb
- Chip db files for arachne-pnr
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- dep: fpga-icestorm
- Tools to handle the bitstream format of Lattice iCE40 FPGAs
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- dep: libc6.1 (>= 2.35)
- GNU C 语言运行库：共享库
同时作为一个虚包由这些包填实： libc6.1-udeb
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- dep: libgcc-s1 (>= 4.2)
- GCC 支持库
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- dep: libstdc++6 (>= 11)
- GNU 标准 C++ 库，第3版
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- dep: libunwind8
- library to determine the call-chain of a program - runtime
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- sug: nextpnr
- 软件包暂时不可用
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- sug: yosys
- Framework for Verilog RTL synthesis