软件包:nextpnr-ice40-qt(0.7-1 以及其他的)
nextpnr-ice40-qt 的相关链接
Debian 的资源:
下载源码包 nextpnr:
维护小组:
- Debian Electronics Team (QA 页面, 邮件存档)
- Ruben Undheim (QA 页面)
- Nathaniel Graff (QA 页面)
- Daniel Gröber (QA 页面)
外部的资源:
- 主页 [github.com]
相似软件包:
FPGA place and route tool for Lattice iCE40 - with GUI
nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric.
In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported.
nextpnr-ice40 supports the Lattice iCE40 series of FPGAs and uses the hardware description chipdb from the fpga-icestorm package.
This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-ice40 package.
其他与 nextpnr-ice40-qt 有关的软件包
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- dep: libboost-filesystem1.83.0 (>= 1.83.0)
- filesystem operations (portable paths, iteration over directories, etc) in C++
-
- dep: libboost-iostreams1.83.0 (>= 1.83.0)
- Boost.Iostreams Library
-
- dep: libboost-program-options1.83.0 (>= 1.83.0)
- program options library for C++
-
- dep: libboost-thread1.83.0 (>= 1.83.0)
- portable C++ multi-threading
-
- dep: libc6 (>= 2.38)
- GNU C 语言运行库:共享库
同时作为一个虚包由这些包填实: libc6-udeb
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- dep: libgcc-s1 (>= 3.3.1)
- GCC 支持库
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- dep: libpython3.12t64 (>= 3.12.1)
- Shared Python runtime library (version 3.12)
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- dep: libqt5core5t64 (>= 5.15.1)
- Qt 5 核心模块
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- dep: libqt5gui5t64 (>= 5.1.0)
- Qt 5 GUI module
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- dep: libqt5gui5t64 (>= 5.14.1)
- Qt 5 GUI module
- 或者 libqt5gui5-gles (>= 5.14.1)
- Qt 5 GUI module — OpenGL ES variant
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- dep: libqt5widgets5t64 (>= 5.14.1)
- Qt 5 widgets 模块
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- dep: libstdc++6 (>= 13.1)
- GNU 标准 C++ 库,第3版
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- dep: nextpnr-ice40-chipdb (= 0.7-1+b1)
- FPGA place and route tool for Lattice iCE40 -- chipdb files
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- sug: fpga-icestorm
- Tools to handle the bitstream format of Lattice iCE40 FPGAs
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- sug: yosys
- Framework for Verilog RTL synthesis