[ 源代码: iverilog ]
软件包:iverilog(11.0-1.1 以及其他的)
Icarus verilog compiler
Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs.
The compiler can target either simulation, or netlist (EDIF).
其他与 iverilog 有关的软件包
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- dep: libbz2-1.0
- 高品质块排序文件压缩程序库 - 运行时库
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- dep: libc6 (>= 2.34)
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同时作为一个虚包由这些包填实: libc6-udeb
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- dep: libgcc-s1 (>= 3.0)
- GCC 支持库
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- dep: libreadline8 (>= 6.0)
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- dep: libstdc++6 (>= 11)
- GNU 标准 C++ 库,第3版
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- dep: zlib1g (>= 1:1.2.0)
- 压缩库 - 运行时
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- sug: gtkwave
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