Paket: covered (0.7.10-5)

[ Källkod: covered  ]

Verilog code coverage analysis tool

Covered is a Verilog code coverage utility that reads in a Verilog design and a generated VCD/LXT dumpfile from that design and generates a coverage file that can be merged with other coverage files or used to create a coverage report. Covered also contains the GUI coverage report utility that reads in a coverage file to allow interactive coverage discovery. Areas of coverage measured by Covered are: line, toggle, memory, combinational logic, FSM state/state-transition and assertion coverage.

Märken: Field: Elektronik, Implemented in: C, User Interface: interface::commandline, interface::graphical, X Window System, Role: Program, Interface Toolkit: uitoolkit::tk, use::viewing, X Window System: Application

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Hämta covered

Hämtningar för alla tillgängliga arkitekturer

Arkitektur	Paketstorlek	Installerad storlek	Filer
amd64	544,2 kbyte	2.409,0 kbyte	[filförteckning]
arm64	463,7 kbyte	2.501,0 kbyte	[filförteckning]
armel	464,2 kbyte	2.240,0 kbyte	[filförteckning]
armhf	465,4 kbyte	1.828,0 kbyte	[filförteckning]
i386	533,6 kbyte	2.544,0 kbyte	[filförteckning]
mips64el	451,2 kbyte	2.589,0 kbyte	[filförteckning]
ppc64el	512,5 kbyte	2.949,0 kbyte	[filförteckning]
riscv64	511,8 kbyte	2.181,0 kbyte	[filförteckning]
s390x	519,4 kbyte	2.565,0 kbyte	[filförteckning]