Paket: covered (0.7.10-5) [debports]

[ Källkod:  ]

Verilog code coverage analysis tool

Covered is a Verilog code coverage utility that reads in a Verilog design and a generated VCD/LXT dumpfile from that design and generates a coverage file that can be merged with other coverage files or used to create a coverage report. Covered also contains the GUI coverage report utility that reads in a coverage file to allow interactive coverage discovery. Areas of coverage measured by Covered are: line, toggle, memory, combinational logic, FSM state/state-transition and assertion coverage.

Andra paket besläktade med covered

• dep: libc6 (>= 2.40)

  GNU C-bibliotek: Delade bibliotek
  också ett virtuellt paket som tillhandahålls av libc6-udeb

• dep: libtcl8.6 (>= 8.6.0)

  Tcl (the Tool Command Language) v8.6 - run-time library files

• dep: libtk8.6 (>= 8.6.0)

  Tk toolkit for Tcl and X11 v8.6 - run-time files

• dep: tklib

  standard Tk Library

• dep: zlib1g (>= 1:1.1.4)

  Kompressionsbibliotek - körtidspaket

• rec: iverilog

  Icarus verilog compiler

  eller verilog

  virtuellt paket som tillhandahålls av iverilog

  eller gplcver (>= 2.12a-1.1)

  Verilog simulator

Hämta covered

Hämtningar för alla tillgängliga arkitekturer

Arkitektur	Paketstorlek	Installerad storlek	Filer
sh4 (inofficiell anpassning)	531,8 kbyte	2.087,0 kbyte	[filförteckning]