[ Bron: opensta ]
Pakket: opensta (0~20191111gitc018cb2+dfsg-1)
Verwijzigingen voor opensta
Debian bronnen:
Het bronpakket opensta downloaden:
- [opensta_0~20191111gitc018cb2+dfsg-1.dsc]
- [opensta_0~20191111gitc018cb2+dfsg.orig.tar.xz]
- [opensta_0~20191111gitc018cb2+dfsg-1.debian.tar.xz]
Beheerders:
Externe bronnen:
- Homepage [github.com]
Vergelijkbare pakketten:
Gate-level Static Timing Analyzer
After synthesis, place and route of a digital circuit, it is necessary to verify the timing of the design. OpenSTA is a tool for doing exactly that. It has a Tcl interface for entering commands for analysing designs.
It typically takes as input a verilog netlist, a liberty file, and other parasitics information from the placed and routed design.
Andere aan opensta gerelateerde pakketten
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- dep: libc6 (>= 2.29)
- GNU C Bibliotheek: Gedeelde bibliotheken
Ook een virtueel pakket geboden door: libc6-udeb
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- dep: libreadline8 (>= 6.0)
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- dep: libstdc++6 (>= 6)
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- dep: zlib1g (>= 1:1.1.4)
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