パッケージ: arachne-pnr (0.1+20190728gitc40fb22-3) [debports]
Place and route tool for iCE40 family FPGAs
Arachne-pnr implements the place and route step of the hardware compilation process for FPGAs. It accepts as input a technology-mapped netlist in BLIF format, as output by the Yosys synthesis suite for example. It currently targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a textual bitstream representation for assembly by the IceStorm icepack command. The output of icepack is a binary bitstream which can be uploaded to a hardware device.
Together, Yosys, arachne-pnr and IceStorm provide an fully open-source Verilog-to-bistream tool chain for iCE40 1K and 8K FPGA development.
The authors of arachne-pnr have now prepared its successor 'nextpnr'.
その他の arachne-pnr 関連パッケージ
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- dep: arachne-pnr-chipdb
- Chip db files for arachne-pnr
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- dep: fpga-icestorm
- Tools to handle the bitstream format of Lattice iCE40 FPGAs
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- dep: libc6 (>= 2.34)
- GNU C ライブラリ: 共有ライブラリ
以下のパッケージによって提供される仮想パッケージでもあります: libc6-udeb
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- dep: libgcc-s1 (>= 3.0)
- GCC 共有ライブラリ
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- dep: libstdc++6 (>= 11)
- GNU 標準 C++ ライブラリ v3
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- sug: nextpnr
- パッケージは利用できません
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- sug: yosys
- Framework for Verilog RTL synthesis