Paketti: opensta-dev (0~20191111gitc018cb2+dfsg-1)

[ Source: opensta  ]

Gate-level Static Timing Analyzer - development files

After synthesis, place and route of a digital circuit, it is necessary to verify the timing of the design. OpenSTA is a tool for doing exactly that. It has a Tcl interface for entering commands for analysing designs.

It typically takes as input a verilog netlist, a liberty file, and other parasitics information from the placed and routed design.

This package contains the header files and some libraries for development.

Tagit: Software Development: Kirjastot, Role: Development Library

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amd64	1,184.9 kt	9,937.0 kt	[tiedostoluettelo]
arm64	1,139.6 kt	9,848.0 kt	[tiedostoluettelo]
armel	1,119.4 kt	8,448.0 kt	[tiedostoluettelo]
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mipsel	1,287.3 kt	9,343.0 kt	[tiedostoluettelo]
ppc64el	1,266.7 kt	11,260.0 kt	[tiedostoluettelo]
s390x	1,078.3 kt	9,765.0 kt	[tiedostoluettelo]